Instruction ManualDistributed Power SystemSB3000 Synchronous Rectifier&RQILJXUDWLRQDQG3URJUDPPLQJS-3034
1-2SB3000 Drive Configuration and ProgrammingAdditional information about using the SB3000 Synchronous Rectifier is found in the wiring diagrams, prin
B-4SB3000 Drive Configuration and Programming
SB3000 Control AlgorithmC-1APPENDIX CSB3000 Control AlgorithmSB3000 Synchronous Rectifiers regulate DC bus voltage using a vector control algorithm. T
C-2SB3000 Drive Configuration and ProgrammingFigure C.1 – Control StructureHardwareSoftwareKi = Vml - WcoVml - AKp = Vml - Wco CGeneratePWMVuVvVw2/
Status of Data in the AutoMax Rack After a STOP_ALL Command or STOP_ALL FaultD-1APPENDIX DStatus of Data in the AutoMax RackAfter a STOP_ALL Command o
D-2SB3000 Drive Configuration and Programming
SB3000 Pre-Charge SequencingE-1APPENDIX ESB3000 Pre-Charge SequencingThe SB3000 Synchronous Rectifier System is shown in figure E.1 on the following p
E-2SB3000 Drive Configuration and ProgrammingFigure E.1 – SB3000 Synchronous Rectifier System DiagramUVWCEGIGBTCEGIGBTCEGIGBTCEGIGBTCEGIGBTCEGIGBTCAPA
SB3000 Pre-Charge SequencingE-3Load Inverter Pre-charge Contactor RequirementsThe status of the SB3000 Rectifier pre-charge contactor (CHG_FB@) must b
E-4SB3000 Drive Configuration and ProgrammingFigure E.2 – Pre-Charge Sequencing State DiagramControl Power OnPre-charge Contactor is OpenPre-charge co
Enabling the Voltage LoopF-1APPENDIX FEnabling the Voltage LoopThe voltage loop in the PMI Processor is enabled using bit 0 of register 100/1100 (VDC_
Configuring the UDC Module, Regulator Type, and Parameters2-1CHAPTER 2Configuring the UDC Module,Regulator Type, and ParametersThe Rack Configurator a
F-2SB3000 Drive Configuration and ProgrammingFigure F.1 – Turning On VDC_RUNPowerOnVac ∗ 1.414OVT_E0%UVT_E0%VDC_RUNVDC_ON
Performing the Bridge TestG-1APPENDIX GPerforming the Bridge TestImportant: This test is normally performed at the factory. It should not be necessary
G-2SB3000 Drive Configuration and ProgrammingBridge Test ProcedureTo perform the bridge test:Step 1. Disconnect, lockout, and tag three-phase AC power
Discharging the DC BusH-1APPENDIX HDischarging the DC BusObserve the following precautions to safely discharge the SB3000 Rectifier’s DC bus capacitor
H-2SB3000 Drive Configuration and Programming
Index Index-1INDEXAAccess level, 3-3Application programming, 4-1 to 4-10AutoMax and UDC task coordination, 4-9AutoMax tasks, 4-1calculating local tuna
Index-2SB3000 Drive Configuration and ProgrammingVAR feedback (volts * amps), 3-40voltage feedback (volts rms), 3-39GGenerating drive parameter files,
IndexIndex-3 PMI receive count, 3-15UDC communication status, 3-9 to 3-11UDC CRC error count, 3-12UDC fiber-optic link status, 3-16UDC format error co
Index-4SB3000 Drive Configuration and Programming
DIFDocumentation Improvement FormUse this form to give us your comments concerning this publication or to report an error that you have found. For con
2-2SB3000 Drive Configuration and ProgrammingStep 4. Select a product type and a regulator (control) type for both drive A and drive B. See the follow
Printed in U.S.A. S-3034 July 1998Rockwell Automation / 24703 Euclid Avenue / Cleveland, Ohio 44117 / (216) 266-7000
Configuring the UDC Module, Regulator Type, and Parameters2-3Step 1. Zoom into the UDC module. The Power Module Interface (PMI) screen will be displa
2-4SB3000 Drive Configuration and ProgrammingStep 3. Use the Configure parameters option to access the Parameter Entry screens. Assuming you are confi
Configuring the UDC Module, Regulator Type, and Parameters2-5•AC Line Frequency (Hz) (Range: 25, 50, or 60, +/- 2%)The AC line frequency parameter is
2-6SB3000 Drive Configuration and Programming2.2.2 PMI Meter Port SelectionPMI Meter ports 1 and 2 are dedicated to driving two standard meters suppli
Configuring the UDC Module, Regulator Type, and Parameters2-7The following variables are available for output on the PMI D/A ports:Table 2.3 – PMI Met
2-8SB3000 Drive Configuration and Programming2.3 Generating the Drive Parameter Filesand Printing Drive ParametersWhen you have completed all of the d
Configuring the UDC Module’s Registers3-1CHAPTER 3Configuring the UDC Module’s RegistersThe Variable Configurator application in the AutoMax Programmi
The information in this users manual is subject to change without notice.Ethernet™ is a trademark of Xerox Corporation.AutoMax™ is a trademark of Rock
3-2SB3000 Drive Configuration and Programming•The Feedback Registers view is used to configure the feedback registers that display the current status
Configuring the UDC Module’s Registers3-33.1 Register and Bit Reference ConventionsUsed in this ManualRegister numbers are shown using the convention
3-4SB3000 Drive Configuration and ProgrammingTable 3.1 – UDC Module Configuration Views and RegistersView Register RangeDescribed in Section:Rail I/O
Configuring the UDC Module’s Registers3-5Note that registers designated System Use Only are read only and may not be changed by the user.Table 3.2 – U
3-6SB3000 Drive Configuration and Programming3.2 Rail I/O Port Registers (Registers 0-23)The Rail I/O Port 0 and Port 1 views are used to assign varia
Configuring the UDC Module’s Registers3-7Table 3.3 – Rail I/O Port RegistersDrive A RegistersDrive B Registers Port and ChannelRail Type and Signal4 O
3-8SB3000 Drive Configuration and ProgrammingTable 3.5 – Fault Register and Check Bit Fault Counter RegisterUsage for a Digital I/O Rail or 4-Input An
Configuring the UDC Module’s Registers3-93.3 UDC/PMI Communication Status Registers(Registers 80-89/1080-1089)The UDC/PMI Communication Status Registe
3-10SB3000 Drive Configuration and ProgrammingUDC Module Communication Status Register (Continued) 80/1080DMA Format Error Bit 4The DMA Format Error b
Configuring the UDC Module’s Registers3-11UDC Module Communication Status Register (Continued) 80/1080Multiplexed Data Verification Failure Bit 9The M
Table of ContentsICONTENTSChapter 1 IntroductionChapter 2 Configuring the UDC Module, Regulator Type, and Parameters2.1 Adding a UDC Module...
3-12SB3000 Drive Configuration and ProgrammingUDC Module CRC Error Count Register 82/1082This register contains the number of messages with CRC errors
Configuring the UDC Module’s Registers3-13PMI Communication Status Register (Continued) 84/1084Overrun Error Bit 3The Overrun Error bit is set if the
3-14SB3000 Drive Configuration and ProgrammingPMI Communication Status Register (Continued) 84/1084Multiplexed Data Verification Failure Bit 9The Mult
Configuring the UDC Module’s Registers3-15PMI Communication Status Register (Continued) 84/1084PMI Operating System Overflow into Stack Memory Bit 15T
3-16SB3000 Drive Configuration and ProgrammingUDC Module Fiber-Optic Link Status Register 88/1088This register shows the current operating state of th
Configuring the UDC Module’s Registers3-173.4 Command Registers (Registers 100-199/1100-1199)The Command Registers view is used to configure command r
3-18SB3000 Drive Configuration and ProgrammingDrive Control Register (Continued) 100/1100!ATTENTION:The motor must be disconnected before the bridge t
Configuring the UDC Module’s Registers3-19Drive Control Register (Continued) 100/1100Enable Parallel Power Module B Bit 11This bit is set to enable th
3-20SB3000 Drive Configuration and ProgrammingI/O Control Register 101/1101The I/O Control Register contains the bits that control the EXT FLT LED on
Configuring the UDC Module’s Registers3-21Voltage Reference Register 102/1102The value in the Voltage Reference register is the desired DC bus voltage
IISB3000 Drive Configuration and ProgrammingAppendix A SB3000 Drive Register Reference ...
3-22SB3000 Drive Configuration and Programming3.5 Feedback Registers (Registers 200-299/1200-1299)The Feedback Registers view is used to configure the
Configuring the UDC Module’s Registers3-23Drive Status Register (Continued) 200/1200Power Factor Current In Limit Bit 3The Power Factor Current in Lim
3-24SB3000 Drive Configuration and ProgrammingDrive Status Register (Continued) 200/1200CCLK Synchronized Bit 14The CCLK Synchronized bit is set when
Configuring the UDC Module’s Registers3-25I/O Status Register (Continued) 201/1201!ATTENTION:Do not use the RPI input on the SB3000 Rectifier’s Resolv
3-26SB3000 Drive Configuration and ProgrammingI/O Status Register (Continued) 201/1201115 VAC Auxiliary Input 5 Bit 5The Auxiliary Input 5 bit reflect
Configuring the UDC Module’s Registers3-27Drive Fault Register (Continued) 202/1202DC Bus Overcurrent Fault Bit 1The DC Bus Overcurrent Fault bit is s
3-28SB3000 Drive Configuration and ProgrammingDrive Fault Register (Continued) 202/1202Charge Fault Bit 6The Charge Fault bit is set if either of the
Configuring the UDC Module’s Registers3-29Drive Fault Register (Continued) 202/1202PMI Power Supply Fault Bit 12The PMI Power Supply Fault bit is set
3-30SB3000 Drive Configuration and ProgrammingDrive Warning Register 203/1203The warnings indicated by the Drive Warning register cause no action by t
Configuring the UDC Module’s Registers3-31Drive Warning Register (Continued) 203/1203Reference In Limit Warning Bit 4The Reference in Limit Warning b
Table of ContentsIIIList of FiguresFigure 2.1 – Power Module Parameter Entry Screen... 2-4Figure 2.2 – PMI
3-32SB3000 Drive Configuration and ProgrammingDrive Warning Register (Continued) 203/1203 Power Module Overload Warning Bit 9The Power Module Overload
Configuring the UDC Module’s Registers3-33Drive Warning Register (Continued) 203/1203Rail Communication Warning Bit 13The Rail Communication Warning b
3-34SB3000 Drive Configuration and ProgrammingPower Device Status Register 204/1204The bits in the Power Device Status register indicate the status of
Configuring the UDC Module’s Registers3-35Power Device Status Register (Continued) 204/1204Phase W-Lower IOC A Bit 5The Phase W-Lower A status bit is
3-36SB3000 Drive Configuration and ProgrammingPower Device Status Register (Continued) 204/1204Phase W Loss Bit 11The Phase W Loss bit is set if AC li
Configuring the UDC Module’s Registers3-37Interlock Register 205/1205The Interlock tests are executed whenever bit 0 or bit 2 of register 100/1100 is
3-38SB3000 Drive Configuration and ProgrammingInterlock Register (Continued) 205/1205Rising Edge Required Bit 4The Rising Edge Required bit is set if
Configuring the UDC Module’s Registers3-39Interlock Register (Continued) 205/1205VDC Not Allowed Bit 11The VDC Not Allowed bit is set if the bridge te
3-40SB3000 Drive Configuration and ProgrammingVAR Feedback (Volts * Amps) Register 211/1211The VAR Feedback register contains the volt-amperes reacti
Configuring the UDC Module’s Registers3-41Parallel Power Module B Status Register 220/1220The bits in the Parallel Power Module B Status register indi
IVSB3000 Drive Configuration and Programming
3-42SB3000 Drive Configuration and ProgrammingParallel Power Module B Status Register (Continued) 220/1220Phase W-Lower IOC B Bit 5The Phase W-Lower B
Configuring the UDC Module’s Registers3-43Parallel Power Module B Status Register (Continued) 220/1220Phase U Current Sharing B Bit 13The Phase U Curr
3-44SB3000 Drive Configuration and ProgrammingParallel Power Module C Status Register (Continued) 221/1221Phase W-Upper IOC C Bit 2The Phase W-Upper C
Configuring the UDC Module’s Registers3-45Parallel Power Module C Status Register (Continued) 221/1221GDI Fault C Bit 7The GDI Fault C bit is set if a
3-46SB3000 Drive Configuration and ProgrammingPower-Up Self-Calibration Faultsegister 202, bit 11 (FLT_PTM@) will also be set.Run Time AC Power Techno
Configuring the UDC Module’s Registers3-47Run Time AC Power Technology Module Faults (Continued)Charge Fault DiagnosticsDiagnostic Fault Code Register
3-48SB3000 Drive Configuration and Programming3.6 Application Registers (Registers 300-599, Every Scan) (Registers 1300-1599, Every Nth Scan)The appli
Configuring the UDC Module’s Registers3-49The registers within this range (1300-1599) that are written to by a UDC task are updated by the UDC operati
3-50SB3000 Drive Configuration and ProgrammingFigure 3.2 – Nth Scan InterruptsLatch “every scan"Output BInput A Run AOutputAInput B Run BScan 1Sc
Configuring the UDC Module’s Registers3-513.7 UDC Module Test I/O Registers (Registers 1000-1017)This view is used to configure the UDC module’s Test
Table of ContentsVList of TablesTable 1.1 – Related Publications... 1-1Tabl
3-52SB3000 Drive Configuration and ProgrammingUDC Test Switch Inputs Register (Continued) 1000COMM A OK LED Bit 9The COMM A OK LED bit shows the statu
Configuring the UDC Module’s Registers3-533.7.2 UDC Module Meter Port Setup Registers (Registers 1000-1017)Registers 1001-1017 are used to configure t
3-54SB3000 Drive Configuration and Programming3.7.2.1 Resolution of Meter Port DataFor meter ports, the output values will be clamped at the outside (
Configuring the UDC Module’s Registers3-55Meter Port 1UDC Module Meter Port 1 Register Number Register 1002UDC register number (0 - 2044) to be mapped
3-56SB3000 Drive Configuration and ProgrammingMeter Port 2UDC Module Meter Port 2 Register Number Register 1006UDC register number (0 - 2044) to be ma
Configuring the UDC Module’s Registers3-57Meter Port 3UDC Module Meter Port 3 Register Number Register 1010UDC register number (0 - 2044) to be mapped
3-58SB3000 Drive Configuration and ProgrammingMeter Port 4UDC Module Meter Port 4 Register Number Register 1014UDC register number (0 - 2044) to be ma
Configuring the UDC Module’s Registers3-593.8 Interrupt Status and Control Registers (Registers 2000-2047)This view is used to configure registers tha
3-60SB3000 Drive Configuration and ProgrammingInterrupt Status Control Registers (Continued) 2000CCLK Counting Bit 5Hex Value: 0010HSug. Var. Name: N/
Configuring the UDC Module’s Registers3-61Scans Per Interrupt Register 2001The Scans Per Interrupt register contains the number of times a UDC task is
VISB3000 Drive Configuration and Programming
3-62SB3000 Drive Configuration and Programming
Application Programming for DPS Drive Control4-1CHAPTER 4Application Programmingfor DPS Drive ControlDistributed Power Drive products are sold only as
4-2SB3000 Drive Configuration and ProgrammingUDC tasks must be written in the Control Block language, a language designed specifically for drive contr
Application Programming for DPS Drive Control4-3All common input values for the UDC task are first read from the dual port memory and then stored in a
4-4SB3000 Drive Configuration and ProgrammingStep 4. SCAN_LOOP block/Enabling CCLKThis control block tells the UDC operating system how often to execu
Application Programming for DPS Drive Control4-5Step 6. Motor thermal overload protectionElectronic thermal overload protection for SA3100 drives is n
4-6SB3000 Drive Configuration and ProgrammingConsider an example in which LIM_BAR is defined to be 150% of full load current, THRESHOLD is 114%, and T
Application Programming for DPS Drive Control4-7Like all tunable values in the AutoMax environment, the values of these UDC task tunables are retained
4-8SB3000 Drive Configuration and ProgrammingThe exchange of command and feedback register data is synchronized through the use of the constant clock
Application Programming for DPS Drive Control4-9Refer to the individual bit descriptions in this manual for more information.4.3 AutoMax Processor Tas
Introduction1-1CHAPTER 1IntroductionThis manual describes the configuration and programming necessary to control the SB3000 Synchronous Rectifier. SB3
4-10SB3000 Drive Configuration and ProgrammingFigure 4.3 – Data/Time Flow for UDC Module and PMI(Background)(Foreground)PMIProcessorUDCModuleAutoMaxPr
On-Line Operation5-1CHAPTER 5On-Line OperationThe ON LINE! command in the System Configurator and the Task Manager applications allows you to access o
5-2SB3000 Drive Configuration and ProgrammingThe option “A” for ALL will automatically load the rack (i.e., AutoMax Processor configuration, the drive
On-Line Operation5-3Deleting UDC TasksWhen a UDC application task is deleted, any local variables which were forced are removed from the force table.
5-4SB3000 Drive Configuration and Programming
SB3000 Drive Register ReferenceA-1APPENDIX ASB3000 Drive Register ReferenceREGISTER MAPRegisters Function 0-23 Analog ch. 0 input over-range24-79Syste
A-2SB3000 Drive Configuration and ProgrammingFEEDBACK REGISTERS (CONTINUED)A/B204/1204 Power Device statusBit 0 Phase U -upper A U_UPA@ 1 Phase V -u
SB3000 Local Tunable VariablesB-1APPENDIX BSB3000 Local TunableVariablesC_E6% CapacitanceThe value in this variable selects the capacitance connected
B-2SB3000 Drive Configuration and ProgrammingL_E6% InductanceThe value stored in this variable sets the inductance of the Power Module. The value is s
SB3000 Local Tunable VariablesB-3VDC_KD% Voltage Loop Derivative GainThe value in this variable selects the voltage loop derivative gain. This value
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